14 Décembre – Thesis defense - Anthony Baltolu
10 h30 Amphi Jean-Paul Dom - Laboratory IMS (building A31) / Talence
Study and analog design of low-power acoustic acquisition systems for mobile applications.
The recent technological advances in microelectromechanical system (MEMS) microphones allow them to be used on a large sound amplitude range. Due to their lower noise level, it becomes possible to capture sound from a faraway distance, while their increased acoustic overload point gives them the ability to capture sound without saturation in a loud environment like a concert or a sport event. Thus, the electronic analog / digital conversion system connected to the microphone becomes the limiting element of the acoustic acquisition system performance. There is then a need for a new analog / digital conversion architecture which has an increased dynamic range. Furthermore, since more and more of these microphones are used in battery-powered devices, the power consumption limitation constraint becomes of high importance.
In the audio frequency band, the sigma-delta analog / digital converters are the ones most able to provide a high dynamic range combined to a limited power consumption. They are split in two families: the discrete-time ones using switched-capacitors circuits and the continuous-time ones using more classical structures. This thesis concentrates on the study and the design of both of these two types of sigma-delta converters, with an emphasis on the low-power consumption, the low production cost (area occupied) and the circuit robustness; in sight of a mass production for portable devices.
A discrete-time sigma-delta modulator design has been made, the latter reaching a signal to noise ratio of 100dB on a 24kHz frequency bandwidth, for a power consumption of only 480µW. To limit the power consumption, new inverter-based amplifiers are used, with an improved robustness against the variations of the fabrication process or of the temperature. Amplifier specifications are obtained thanks to an accurate high-level model developed, which allows to avoid over-design while ensuring that the wanted performances are reached. Finally, a large oversampling ratio has been used to reduce the switched-capacitors area, lowering the modulator cost.
After a theoretical study of the equivalence between discrete-time and continuous-time modulators, and of continuous-time modulators specificities, a design of the latter has been made too. It reaches a signal to noise ratio of 95dB on a 24kHz bandwidth, while consuming 142µW. To reduce the power consumption and the occupied area, a second-order loop filter is implemented using a single amplifier, and the quantizer uses a VCO-based structure that provides inherently an integrating stage. The VCO-based quantizer is realized using digital cells, lowering the consumption and area, but is highly non-linear. This non-linearity has been handled by architectural choices to not influence the final modulator performances.