05 Juillet – Thesis defense - Nicola Verrascina
10 h30 Amphi F - building A29 (Talence campus)
Design of ultra-low power circuits for energy harvesting applications.
The increasing diffusion of Wireless Sensor Node (WSNs) and Body-Area sensor Network (BAN) is mainly due to the demand of smart environment in order to increase the quality
of life. Several are the application domains: from domotic to industry, from medicine to rural applications. Normally a sensor network counts huge number of sensors that may
be placed in hostile environment. Many times the batteries replacement is hard and expensive.
Therefore the need to find another type of energy source, replacing the batteries, has create an increasing interest in the scientific academy.
The development of new material and the technological progress have supported the possibility to extract the energy from non-conventional sources for small scale applications.
However the amount of energy density is not high as it spans from the highest value of 500 uW/cm2 for solar source to the lowest one of 1 uW/cm2 for radio-frequency source.
The energy constraint poses a several challenge for the designers to extend the lifetime devices. Ultra-low power consumption is the survival key for the energy-harvested sensor
node. The reduction of the power budget can be achieved by mixing different low -power techniques at three levels of abstraction: transistor level, circuit level and system level.
This thesis deals with the analysis and the design of Ultra-Low Power (ULP) circuits suitable for Energy-Harvesting Wireless Sensor Networks (EHWSN). In particular, voltage
regulator and transmission circuits are examined. The former is the main block in power management unit; it interfaces the transducer circuit with the rest of the sensor node.
The latter is the most energy hungry block and thus decreasing its power consumption can drastically increases the sensor on-time.
The thesis is structured as follows:
Chapter 1 describes the harvesting sources available in the environment, highlighting for each of them the main advantages and drawbacks when they are applied in small scale
devices. The second part of this chapter is dedicated to the low-power techniques. Three levels of abstraction are introduced (CMOS technology, Circuit and System) with their
advantages and drawbacks.
Chapter 2 is dedicated to the study of wireless sensor networks. A general framework is given on the sensor architecture with highlights on the fundamental blocks. The expression
for the required radiated power is obtained for a given distance. The duty-cycled equation is also obtained to get the best trade-off in terms of required energy, communication
channel quality and amount of data transfer.
Chapter 3 focuses on the design of very efficient Low-DropOut voltage (LDO) regulator. Many are the efforts to achieve good regulation accuracy by addressing ultra low power
consumption. Especially for transient response the closed loop frequency response and the slew-rate of the error amplifier require high quiescent current to achieve good performances.
In this work an adaptively bias current and a class-AB error amplifier are implemented in such way the increase in quiescent current is proportional to the very large load current. With these techniques the impact on the global power consumption of LDO is reduced. Moreover high current efficiency for all load conditions is also achieved. The stability of closed loop is ensured by a current buffer and a Miller capacitor for the whole range of operational load current. The stability is guaranteed also for very low stand-by current.
In chapter 4 the design flow of OOK modulation transmitter is addressed. The low targeted radiated power of -15 dBm poses a severe limitation for the global transmitter efficiency.
The first part of the chapter is dedicated to the study of classical cascaded architectures where the output oscillator (VCO) is directly connected to the input of power driver. The
trade-off between the supply voltage and the matching network is described highlighting the difficulty to integrate the passive elements of matching network when the supply voltage
for the power amplifier is about 1 V. To circumnavigate this problem a current reuse transmitter is proposed where the power driver and the VCO are stacked and the same
bias current is used. With this architecture the supply voltage can be tuned between the two circuits to achieve the best trade-off between the power consumption and the
performances of each circuit.